1. Technical Field
Embodiments of the present disclosure relate to a semiconductor device, and more particularly, to a semiconductor package and a method for manufacturing the same.
2. Related Art
Electronic devices are becoming smaller with improved performance, and portable mobile products are increasingly in demand. Thus, ultra-small and large-capacity semiconductor memories are also increasingly in demand. In order to increase the storage capacity of a semiconductor memory, a plurality of semiconductor chips may be mounted in a single package and then assembled.
Methods of forming a single package including multiple chips include a method of mounting a plurality of semiconductor chips in a horizontal direction and a method of mounting a plurality of semiconductor chips in a vertical direction. Among these methods, a method of forming a stack-type multi-chip package in which a plurality of semiconductor chips is vertically stacked is widely used to implement electronic devices having a reduced size. A stack-type multi-chip package has a high chip density in a limited area because a plurality of semiconductor chips is vertically stacked. In stack-type multi-chip packages, through-silicon vias (TSVs) have been proposed to couple the stacked chips. A package using TSVs has a structure in which TSVs penetrate a plurality of chips so as to physically and electrically couple the chips to each other.
Recently, as semiconductor devices are becoming widely used in electronic devices such as mobile devices and home appliances, a system in package (SIP) has been attracting attention. A SIP includes the same or different types of semiconductor devices, which are vertically stacked and coupled to each other through TSVs to form a single package. In an SIP, a plurality of chips is vertically stacked, unlike single-chip package. Thus, the same type of chips may be stacked to increase the storage density, or different types of chips may be arranged to manufacture a package having various functions.